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Mother of Timing 32.768kHz Clock Crystal

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Mother of Timing 32.768kHz Clock Crystal

  • Feb 26, 2021

Clock Crystal Specification: FL:32.768kHz, CL:12.5pF,Tol.: +/-30ppm

Standard Pierce Oscillator from MICRO CRYSTAL WITZERLANO information:



  • The"inverter" characteristics define the oscillator's performances and crystal constraints.
  • The serial resistor R.helps to suppress the crystal's overtone mode and may helps toreduce the drive level.
  • The chosen crystal and its specification should match the oscillator's design and constraints.
  • The load capacitors Cg and C(regarded inseries) form the oscillator's effective load capacitance.



Oscillation Conditions

- Loop gain:

At steady state, the closed loop gain = 1.

. Phase shift:

At the oscillation's frequency, the closed loop phase shift = 2T

.Startup:

When initially energized,the noise component at the frequency which satisfies the phase condition for oscillation is propagated around the loop with increasing amplitude.Startup times around 1 second are normal values for such low frequency tuning fork crystals.

Amplitude:

The signal amplitude increases continually, until the amplifier gain is reduced either by nonlinearity of the active elements ("Self Limiting Pierce") or by some automatic level control (AGC circuitry, "Controlled Pierce").

Things to Check on an Oscillator

. Oscillation Allowance:

Negative resistance model, crystal constraints.

. Effective Load Capacitance:

Frequency accuracy.

. Overtone Mode Suppression:

Crystal's overtone mode ~6.ix the fundamental mode frequency..

. Drive Level:

Maximal power which could be dissipated by the crystal.


Layout Considerations

General Constraints

- Crystals oscillators are analog circuit and the PCB design must follow analog-board layout rules.

· Tuning Fork crystals drive level is extremely low(<1 uW).

. Long traces make crystals oscillators very sensitive to ESD,EMC and crosstalk.

For all these reasons, special attention should

be paid on the PCB layout!


Design Rules

. Traces between the micro controller pins, the crystal and the external load capacitors, should be as short as possible.

· External load capacitors layout have to be symmetrical and both ground connections should be as close as possible.

. ln order to avoid direct signal couplingXIN and XOUT traces should be routed as far as possible from each other.

- Routing on inner layers and vias must be avoided.

.Digital signal lines should be kept as far as possible from the crystal.

. Digital signal lines should not be routed on inner layers under the crystal area.

. The crystal housing (Metal-can packages) should be connected to ground.

.A ground guard ring or an inner layer (or opposite side) ground plane is recommended.The guard ring or ground plane should be connected with a short trace to VSS of the micro controller, and should not be connected to any other ground signals.

Layout Example 1:

Layout Example 2



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